
015/033 30 Jul 90 11:18:53
From:   David Kirschbaum
To:     Simon Giles
Subj:   Re: Prefetch queue
Attr:   
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8086-family processors read in several bytes of program code in advance
(therefore "pre-fetching" its next instructions). That way the next 
instructions are right there "on-chip", ready to be processed. (Since memory 
accesses are SO slow relative to on-chip access.)
I used to play tricks with this prefetch queue to stop people trying to step 
through my programs with a debugger! You could actually load the processor with 
an instruction or two (again, I warn, nr of bytes varies depends on which 
processor you have), then change the program code right in front of the IP 
(Instruction Pointer). If the processor were running "full speed", it would 
skip right over the changed memory (since those instructions were already in 
prefetch queue) and would keep on running. If it were "stepping" through the 
instructions, it would read in the changed instructions (like jmp outer_space 
or whatever) and choke/die.
Very enlightening! Especially when I was hacking on an 80286 but trying to make 
sure it ran on an 8088 .. and processors had different length queues.
But a JMP instruction tells the processor to dump that prefetch queue! We're 
now going somewhere else, and the next instructions no longer are effective!
NOPs are simply instructions, staying in queue. JMP $+2 is going somewhere 
(although we aren't, really!) .. so the queue is dumped, and more time is spent 
getting ready for the next instruction.
  Now that I've made all this perfectly clear .. but consider what you paid for 
it!

David Kirschbaum
Toad Hall


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